Open Engineering Sciences Journal

2014, 1 : 1-6
Published online 2014 November 12. DOI: 10.2174/2352628901401010001
Publisher ID: ENG-1-1

RESEARCH ARTICLE
 Hardware Implementation of Fir Filter Based on Number-theoretic Fast Fourier Transform in Residue Number System

V.M. Amerbaev , R.A. Soloviev and D.V. Telpukhov, *
Institute for Design Problems in Microelectronics of RAS, Zelenograd, Moscow

* *Address correspondence to this author at the Institute for Design Problems in Microelectronics of RAS, Zelenograd, Moscow; Tel: 8(499)7299890; Fax: 8(499)7299208; E-mail: nofrost@inbox.ru

ABSTRACT

New approach to hardware FIR filter implementation is described in this paper. Method includes the conversion to the frequency domain, as well as the principles of residue number systems and number-theoretic transforms. Parameterized RTL IP-core generators were implemented for both conventional and developed methods. These IP generators were used to implement different devices for different filter orders and input widths. Filters were synthesized, and resulting time and hardware evaluation allow one to consider the effectiveness of the method compared with the conventional realization of FIR filter.

Keywords:

Convolution theorem, finite impulse response filter, number theoretic fast fourier transform, residue number system, verilog.